Verigy 93k Tester Manual [repack] Jun 2026

Familiarizing with the SmarTest software platform for programming and debugging. Conclusion

Execute AC/Functional tests by running digital pattern vectors at full operational speed. 5. Troubleshooting & Debugging Tools

The 93k excels at parallel testing (Multi-Site). Ensure your test method code is written using multi-site safe API calls. Avoid serial loops in C++/Java that process one site at a time; utilize the platform's hardware-broadcasting capabilities.

Determine the routing behavior based on the test outcome. For instance, if the test fails, route the flow directly to a Hard Bin (e.g., Bin 5: Functional Fail ) to optimize test time. 4. Troubleshooting, Calibration, and Diagnostic Routines

The Verigy 93000 (V93K) SoC Series is the semiconductor industry standard for Automated Test Equipment (ATE). Navigating its extensive documentation is essential for test engineers to maximize throughput, optimize multi-site efficiency, and debug complex mixed-signal, digital, and RF integrated circuits. 1. System Architecture and Hardware Overview verigy 93k tester manual

A standard manufacturing manual for the 93k prioritizes a core sequence of tests to screen out defective parts as early as possible. DC Parametric Tests

Each pin has its own memory and processor, allowing for independent testing and high throughput.

93k Tester 02 Hardware Overview Rev.7.2.2.A.00 | PDF - Scribd

The semiconductor industry is defined by an relentless pursuit of complexity and speed. As chips became smaller and more integrated, the equipment used to verify their functionality had to evolve from simple signal checkers into sophisticated, high-speed computing environments. The Verigy V93000 stands as a landmark in this evolution, representing a shift toward modular, scalable, and software-driven testing. 1. A Modular Philosophy Troubleshooting & Debugging Tools The 93k excels at

Designed with water-cooled building blocks.

The system grows with the product. A company can start with a small "A-Class" system and scale up to a "L-Class" or "SmartScale" configuration as their chip complexity increases.

Checks the physical connection between the tester probe/socket and the chip. It utilizes the protection diodes present on CMOS I/O pins by forcing a small current (e.g., ) and measuring the forward voltage drop. Gross Leakage (

Since Advantest acquired Verigy, the best place to find the most current documentation is on the or within the SmarTest installation directory on the tester itself. Look for PDF versions of: V93000 System User Manual V93000 Hardware Reference SmarTest Test Program Development Guide Determine the routing behavior based on the test outcome

In the flow editor, create a new Test Suite entry and assign it a standard production test method (e.g., FunctionalTest ).

To execute a basic digital functional test, the engineer must link these components inside the SmarTest Flow Tool:

A unique challenge in analyzing the V93000 manual is the historical context of the Verigy and Advantest merger. Long-time users often have to navigate a legacy of documentation. Older manuals may reference legacy Verigy terminologies, while newer updates integrate Advantest’s broader portfolio.

Power up the tester mainframe and boot the Linux workstation. Launch the SmarTest software environment.